Towards a Universal Building Block of Molecular and Silicon Computation

The next two decades will bring us silicon computation resources that seem unimaginable today. Advances in lithographic technology will enable devices with ten billion transistors and beyond. Surprisingly, the challenges that face traditional silicon computing are eerily similar to those molecular and other nanoscale devices must confront. The solution we propose for scalable silicon, the computation cache, is adaptable to molecular devices. A computation cache is a uniform substrate built from a simple tile. Each tile encapsulates the functionality to compute a single instruction and self-organize with other tiles to execute entire applications. This tile serves as a key architectural link between the silicon and non-silicon domains. The network connecting tiles need not be uniform and we envision encapsulating these tiles in specialized packages and bonding agents to form “computational paint.” In the longer term, our research into the minimal tile for substrate construction has implications for molecular devices; e.g. if a molecule can be synthesized with this minimum functionality a molecular computational paint will be realizable.